Wednesday, June 12
North And South Edition
- Possibly the coolest little tech tidbit of the day is from AMD again.
The new Ryzen 3000 family consists of one or two CPU chiplets (up to 8 cores each) and an I/O die handling memory and PCIe 4.0 and some built-in SATA and USB and other functions. The chiplets are connected to each other using AMD's Infinity Fabric 2 at 50GB/s.
On the 12 and 16 core chips the two CPU chiplets are connected directly to each other, and each is also connected to the I/O die.
[Update: Apparently, unlike earlier Epyc and Threadripper chips, the CPU chiplets only talk via the I/O die, and that handles all the routing. That saves a lot of traces on the package, at the expense of latency. But there's no practical way to route 28 interconnects on a 64 core Epyc anyway, which is what would be required. First generation Epyc only requires 6 such links.]
The I/O die connects to the X570 chipset over PCIe 4.0. Like the I/O die, the chipset includes a bunch of PCIe 4.0, SATA, and USB.
Very much like the I/O die, in fact, because it is the I/O die. The I/O chip on the motherboard is the exact same chip as the one on the CPU.
Which in theory means that both the CPU and the X570 have some tricks up their sleeves that weren't previously discussed.
- All those messy Star Control lawsuits and countersuits have been settled amicably for a jar of honey and a pint of mead. (PC Gamer)
As Brickmuppet notes, I am never facetious. I don't need to be.
"We added a section in which I'll be working with Paul on beekeeping. He's going to send me some meade, I'm going to send him some honey. I don't think the lawyers were particularly enthusiastic about us incorporating some of this into the agreement. I did a tutorial video on beekeeping I was going to send over but got stung in the video, so thought better than to actually send it."
- I had to enable notifications on Tohru because we were adding them to our apps at my day job. Holy crap those are annoying.
It gets better immediately after that, though. The internship arc and subsequent episodes have the same mix of more-or-less rational educational procedure and heroic adventure as season one.
I haven't watched in a while, so there's a lot in my queue.
Posted by: Mauser at Thursday, June 13 2019 01:52 PM (Ix1l6)
Anandtech says that's not true. I guess we'll find out for sure eventually.
"The EPYC Rome processors, built on these Zen 2 chiplets, will have up to eight of them, enabling a platform that can support up to 64 cores. As with the consumer processors, no chiplet can communicate directly with each other – each chiplet will only connect directly to the central IO die."
Posted by: Rick C at Thursday, June 13 2019 02:57 PM (Iwkd4)
Posted by: Pixy Misa at Thursday, June 13 2019 04:40 PM (PiXy!)
The news that they got a 3950X to 5+GHz all core on LN2 was a bit disappointing because it means there's probably no way to get close to that on air or water, and Zen 2 is probably going to be like Zen+, that is, pretty much no room for overclocking. Even the hardcore overclockers said that you can't really do any better than PB2/PBO, so I suspect that "all-core 4.5 or so" is probably the best there will be--but it'll still probably be a decent bump up from my 1600X which can do 4.0 but I leave at 3.9 for voltage reasons.
Posted by: Rick C at Friday, June 14 2019 02:21 AM (Iwkd4)
58 queries taking 0.1493 seconds, 292 records returned.
Powered by Minx 1.1.6c-pink.